3 lines
244 B
Plaintext
3 lines
244 B
Plaintext
INFO: [VRFC 10-163] Analyzing VHDL file "/home/aleandro/Projects/progetto_reti_logiche/progetto_reti_logiche.srcs/sources_1/new/progetto_reti_logiche.vhd" into library xil_defaultlib
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INFO: [VRFC 10-3107] analyzing entity 'project_reti_logiche'
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